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DTSTAMP:20260202T201224Z
LOCATION:Hall 6
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UID:submissions.supercomputing.org_SC25_sess553_job295@linklings.com
SUMMARY:Performance Modeling Engineer
DESCRIPTION:Mission:\nPerformance modeling of Groq systems on state-of-the
 -art AI/ML workloads, identify bottlenecks early and guide future hardware
  development of the most advanced AI accelerator on the market.\n\nRespons
 ibilities & opportunities in this role:\nDevelop and maintain performance 
 models for multiple generations of Groq hardware on the latest AI/ML workl
 oads (LLMs, CNNs, LSTMs, etc.)\nAnalyze AI/ML algorithms to understand the
 ir compute, networking and memory requirements, and map them effectively o
 nto the underlying hardware architecture \nLead a matrixed team to enable 
 SW/HW co-optimization across chip, system and software teams\nIdentify per
 formance bottlenecks and help drive next generation chip architecture thro
 ugh a solid understanding of Groq's software and hardware\nWork with silic
 on and system integration engineers to evaluate the costs & benefits of ne
 w technologies on Groq systems\nProvide what-if scenarios / continuous gui
 dance directly to CEO & senior leadership \nDevelop the Design Space Explo
 ration (DSE) tool for performance analysis and exploration of both chip an
 d system across various workloads\nDefine custom hardware solutions for hi
 gh profile customers\n\nIdeal candidates have/are:\nComputer science, math
 ematics, ECE or equivalent background and/or experience in this domain\nSt
 rong fundamentals in computer architecture, with deep knowledge and experi
 ence of working on domain specific AI architectures, is highly preferred\n
 In-depth understanding of latest AI/ML algorithms and their hardware impli
 cations\nAbility to analyze and simplify complex hardware designs into sim
 ple abstracted timing models\nPast experience on modeling AI/ML workloads,
  and creating necessary tools for performance optimization. Experience wit
 h modeling LLM performance is beneficial, but not required\nProficient in 
 programming languages such as C/C++ and Python\nExperience with cycle-accu
 rate simulators for benchmarking analysis\nExperience with developing ASIC
  microarchitecture design is a plus\nExperience with understanding and sim
 ulating RTL (systemVerilog) designs is a plus\n\nAttributes of a Groqster:
 \nHumility - Egos are checked at the door\nCollaborative & Team Savvy - We
  make up the smartest person in the room, together\nGrowth & Giver Mindset
  - Learn it all versus know it all, we share knowledge generously\nCurious
  & Innovative - Take a creative approach to projects, problems, and design
 \nPassion, Grit, & Boldness - no limit thinking, fueling informed risk tak
 ing\n\nRegistration Category: Technical Program Reg Pass, Workshop Reg Pas
 s, Tutorial Reg Pass, Exhibits Reg Pass\n\nCountry: United States of Ameri
 ca\n\nCompany: Groq\n\nIn-Person / Remote: Remote\n\nPart Time / Full Time
 : Full Time\n\nPosition Type: Permanent\n\n
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