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DTSTAMP:20260202T201224Z
LOCATION:Hall 6
DTSTART;TZID=America/Chicago:20251117T165200
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UID:submissions.supercomputing.org_SC25_sess553_job286@linklings.com
SUMMARY:Senior Staff Hardware System Design Engineer
DESCRIPTION:Mission:\nPerform detailed circuit design and analysis and com
 ponent selection for cost-optimized solutions and ensure successful produc
 t development with aggressive product cycles.\n\nResponsibilities & opport
 unities in this role:\nProduct‑Driven Design Leadership – Translate Produc
 t Requirement Documents (PRDs) into detailed board functional specificatio
 ns, schematic capture, and PCB layout, ensuring every design decision alig
 ns with the overall product strategy.\nHigh‑Speed Interface Engineering – 
 Architect and validate SerDes, PCIe, DDR, and other high‑bandwidth links, 
 pushing the limits of signal integrity and timing closure.\nPower Delivery
  & Sub‑Section Design – Design robust power rails (POLs, VRMs, etc.) that 
 deliver clean, low‑noise supply to the GroqChip LPU while meeting stringen
 t power budgets.\nLow‑Speed Interface & Firmware Integration – Implement S
 PI, I²C, CAN‑bus, and other control buses, and interface them with CPLDs/F
 PGAs using Verilog to support board‑level control and diagnostics.\nASIC B
 ring‑Up & Validation – Lead the design of test boards for ASIC bring‑up an
 d post‑silicon validation, debugging hardware and firmware issues in a lab
  environment.\nChassis & System Integration – Contribute to chassis design
  and multi‑system implementations, ensuring mechanical, thermal, and elect
 rical compatibility across the product family.\nDebug & Certification Supp
 ort – Own end‑to‑end debugging of chip, board, and system‑level issues; su
 pport product certification and go‑to‑market activities.\nCross‑Functional
  Collaboration – Work hand‑in‑hand with software, firmware, and product te
 ams to deliver a cohesive, high‑performance silicon solution.\n\nIdeal can
 didates have/are:\nDeep Hardware Design Expertise – 10+ years of proven ex
 perience in schematic capture, constraint management, and PCB layout for h
 igh‑speed, high‑density systems.\nSignal Integrity & Power Delivery Master
 y – Hands‑on experience with SerDes, PCIe, DDR, and power sub‑sections (PO
 Ls, VRMs, etc.).\nFirmware & FPGA Proficiency – Comfortable writing Verilo
 g for CPLDs/FPGAs and integrating firmware with hardware.\nLab‑Ready Debug
 ging Skills – Proficient with oscilloscopes, logic analyzers, power analyz
 ers, and other measurement tools to isolate and resolve complex hardware f
 aults.\nTeam‑Oriented, Self‑Starter Mindset – Thrive in a collaborative en
 vironment, prioritize tasks under tight deadlines, and drive projects to c
 ompletion with minimal oversight.\n\nAttributes of a Groqster:\nHumility -
  Egos are checked at the door\nCollaborative & Team Savvy - We make up the
  smartest person in the room, together\nGrowth & Giver Mindset - Learn it 
 all versus know it all, we share knowledge generously\nCurious & Innovativ
 e - Take a creative approach to projects, problems, and design\nPassion, G
 rit, & Boldness - no limit thinking, fueling informed risk taking\n\nRegis
 tration Category: Technical Program Reg Pass, Workshop Reg Pass, Tutorial 
 Reg Pass, Exhibits Reg Pass\n\nCountry: United States of America\n\nCompan
 y: Groq\n\nIn-Person / Remote: In-person\n\nPart Time / Full Time: Full Ti
 me\n\nPosition Type: Permanent\n\n
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