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DTSTART;TZID=America/Chicago:20251116T133000
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UID:submissions.supercomputing.org_SC25_sess274_tut169@linklings.com
SUMMARY:In-Network Computing with SmartNICs for HPC Applications
DESCRIPTION:Jeffrey Young (Georgia Institute of Technology), Elie Kfoury (
 University of South Carolina), Richard Graham (NVIDIA Corporation), Mariam
  Kiran (Oak Ridge National Laboratory (ORNL)), Antonio J. Peña (Barcelona 
 Supercomputing Center (BSC)), Jorge Crichigno (University of South Carolin
 a), and Aaron Jezghani (Georgia Institute of Technology)\n\nThe past few y
 ears have witnessed an increased level of support for and deployment of pr
 ogrammable network adapters, known as "SmartNICs." These enhanced network 
 devices offer standard packet processing capabilities as well as advanced 
 "in-network" computing features built around programmable lightweight proc
 essing cores, FPGAs, and even CPU- and GPU-based platforms capable of runn
 ing separate operating systems. SmartNICs have gained rapid adoption for d
 ata center tasks, including infrastructure management, packet filtering, a
 nd I/O acceleration. Increasingly, these devices are also being explored f
 or high performance computing (HPC) and AI application acceleration. This 
 tutorial offers an in-depth exploration of the state of the art for SmartN
 ICs and the emerging software ecosystems supporting them. Attendees will e
 ngage in hands-on exercises to better understand how to take advantage of 
 SmartNICs for accelerating HPC and AI applications. Specific topics includ
 e MPI and OpenMP offloading, algorithmic modifications to utilize SmartNIC
  processors, in-line packet processing frameworks like P4, security and co
 ntainerization efforts, and I/O acceleration techniques. Participants will
  have the opportunity to execute these exercises using cutting-edge SmartN
 ICs like NVIDIA’s BlueField-3 data processing unit (DPU) and a cloud-based
  netlab environment. Tutorial presenters will discuss additional technique
 s for optimizing applications to harness SmartNICs as communication accele
 rators in HPC systems.\n\nRecording: Livestreamed, Recorded\n\nRegistratio
 n Category: Tutorial Reg Pass\n\n
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