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DTSTART;TZID=America/Chicago:20251117T121000
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UID:submissions.supercomputing.org_SC25_sess236_ws_risc101@linklings.com
SUMMARY:Assessing a RISC-V Accelerator for Cross-Section Lookup in Chipyar
 d
DESCRIPTION:Andrew Ledbetter, Kazutomo Yoshii, and John Tramm (Argonne Nat
 ional Laboratory (ANL))\n\nHigh-fidelity nuclear reactor simulations using
  Monte Carlo\nneutron transport face bottlenecks in neutron cross-section\
 nlookups. We designed a custom RISC-V accelerator for\nRSBench, integrated
  with a RocketCore in Chipyard. The\npipelined design employs Humlíček’s 8
 th-order rational ap-\nproximation to efficiently compute the Faddeeva fun
 ction\nduring Doppler broadening of multipole cross section data,\nwhich f
 orms the inner loop of the program, achieving a 17×\ncycle reduction for F
 addeeva computations and 34.2× for\nthe loop compared to RISC-V software, 
 with similar gains\nover Intel Core i5 Tiger Lake-U, yielding a 10× wall-c
 lock\ntime improvement. Chipyard’s software-based environment\nbenefits th
 e HPC community by enabling accelerator eval-\nuation. These results highl
 ight RISC-V’s potential for HPC\nthrough custom accelerators and code port
 ability. Future work\nwill optimize operating frequency and extend to addi
 tional\nsimulation kernels.\n\nRecording: Livestreamed, Recorded\n\nRegist
 ration Category: Technical Program Reg Pass, Workshop Reg Pass\n\nSession 
 Chairs: Nick Brown (Edinburgh Parallel Computing Centre (EPCC); University
  of Edinburgh, Scotland); David Donofrio (Tactical Computing Laboratories 
 LLC, Lawrence Berkeley National Laboratory (LBNL)); Teresa Cervero (Barcel
 ona Supercomputing Center (BSC)); Daniele Gregori (E4 Computer Engineering
 ); and Matthew Turner (Hewlett Packard Enterprise (HPE))\n\n
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