BEGIN:VCALENDAR
VERSION:2.0
PRODID:Linklings LLC
BEGIN:VTIMEZONE
TZID:America/Chicago
X-LIC-LOCATION:America/Chicago
BEGIN:DAYLIGHT
TZOFFSETFROM:-0600
TZOFFSETTO:-0500
TZNAME:CDT
DTSTART:19700308T020000
RRULE:FREQ=YEARLY;BYMONTH=3;BYDAY=2SU
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0500
TZOFFSETTO:-0600
TZNAME:CST
DTSTART:19701101T020000
RRULE:FREQ=YEARLY;BYMONTH=11;BYDAY=1SU
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTAMP:20260202T201333Z
LOCATION:274
DTSTART;TZID=America/Chicago:20251116T140000
DTEND;TZID=America/Chicago:20251116T173000
UID:submissions.supercomputing.org_SC25_sess201@linklings.com
SUMMARY:MEMO’25: International Workshop on Memory System Management and Op
 timization
DESCRIPTION:The increasing disparity between computing speed and memory sp
 eed, commonly referred to as the memory wall, remains a critical and endur
 ing challenge in the high performance computing and analytics community. T
 his workshop aims to bring together computer science and computational sci
 ence researchers, from industry, government labs and academia, concerned w
 ith the challenges of efficiently using existing and emerging memory syste
 ms. The term "performance" for memory systems is general, and includes lat
 ency, bandwidth, power consumption and reliability from the aspect of hard
 ware memory technologies to how it is manifested in the application perfor
 mance.\n\nUmpire: Portable Memory Management for High-Performance Computin
 g Applications\n\nModern high-performance computing (HPC) systems present 
 application\ndevelopers with increasingly complex memory hierarchies\nthat
  include multiple types of memory with varying access patterns,\ncapacitie
 s, and performance characteristics. Managing these\nresources efficiently 
 while maintaining code por...\n\n\nKristi Belcher (Lawrence Livermore Nati
 onal Laboratory) and David Beckingsale (Lawrence Livermore National Labora
 tory (LLNL))\n---------------------\nCXL mini-Session\n\nAndres Marquez (P
 NNL) and Jie Ren (William & Mary)\n---------------------\nMEMO’25: Interna
 tional Workshop on Memory System, Management and Optimization\n\nThe incre
 asing disparity between computing speed and memory speed, commonly referre
 d to as the memory wall, remains a critical and enduring challenge in the 
 high performance computing and analytics community. This workshop aims to 
 bring together computer science and computational science researchers...\n
 \n\nStephen Lecler Olivier (Sandia National Laboratories), Maya Gokhale (L
 awrence Livermore National Laboratory (LLNL)), Ivy Peng (KTH Royal Institu
 te of Technology), Kyle Hale (Oregon State University), and Ronald Minnich
  (Hewlett Packard Enterprise (HPE))\n---------------------\nThe MALL is Op
 en: Exploring Shared Caches and Latency in AMD CDNA™ 3 GPUs\n\nThis paper 
 presents an analysis of memory hierarchy latency across AMD Instinct™ MI30
 0A, MI300X, and MI250X GPUs using a fine-grained pointer-chasing microbenc
 hmark. We characterize the scalar L1 (sL1), L2, AMD Infinity Cache™ referr
 ed to as the MALL (Memory Attached Last Level), and HBM...\n\n\nAndrew Tee
  (University of California, Riverside; Advanced Micro Devices, Inc. (AMD))
 ; Nicholas Curtis and Noah Wolfe (Advanced Micro Devices, Inc. (AMD)); and
  Daniel Wong (University of California, Riverside)\n---------------------\
 nHardware-Software Co-Design of Iterative Filter-Update Numerical Methods 
 Using Processing-In-Memory\n\nData movement is a key bottleneck in applica
 tions such as machine learning and scientific computing. Some software tec
 hniques address this by computing on subsets of data but this still requir
 es reading the entire dataset to determine the subset. We propose a hardwa
 re-software co-design approach for...\n\n\nEric Tang and Tianyun Zhang (Ca
 rnegie Mellon University), William Bradford and Farzana Ahmed Siddique (Un
 iversity of Virginia), James C. Hoe (Carnegie Mellon University), Kevin Sk
 adron (University of Virginia), and Franz Franchetti (Carnegie Mellon Univ
 ersity)\n---------------------\nAfternoon Break - MEMO’25: International W
 orkshop on Memory System, Management and Optimization\n-------------------
 --\nPanel: Energy-efficient Memory Technology for maximizing bandwidth and
  reducing latency\n\nStephen Lecler Olivier and Gwendolyn Voskuilen (Sandi
 a National Laboratories), Nuwan Jayasena (AMD), Josh Fryman (Intel Corpora
 tion), Mike O'Connor (NVIDIA), and Michael James (Cerebras)\n-------------
 --------\nCaRDS: Compiler-aided Remote Data Structures\n\nFar memory tiers
  improve memory utilization by enabling memory intensive applications to u
 se idle memory from other machines over the network. Recently, compiler ap
 proaches to far memory have demonstrated how static analysis can be levera
 ged to automatically transform applications to make efficient ...\n\n\nBri
 an Tauro and Ian Dougherty (Illinois Tech) and Kyle Hale (Oregon State Uni
 versity)\n\nRecording: Livestreamed, Recorded\n\nRegistration Category: Te
 chnical Program Reg Pass, Workshop Reg Pass\n\nSession Chairs: Stephen L. 
 Olivier (Sandia National Laboratories), Maya Gokhale (Lawrence Livermore N
 ational Laboratory (LLNL)), Ivy Peng (KTH Royal Institute of Technology), 
 Kyle Hale (Oregon State University), and Ronald Minnich (Hewlett Packard E
 nterprise (HPE))
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