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UID:submissions.supercomputing.org_SC25_sess190_exforum110@linklings.com
SUMMARY:Next Vector Project Based on Proven NEC Vector and RISC-V Architec
 ture
DESCRIPTION:Masashi Ikuta and Shintaro Momose (NEC Corporation)\n\nThe Nex
 t Vector Project by NEC addresses the growing challenges in high performan
 ce computing (HPC), such as energy efficiency, scalability, and accessibil
 ity. Building on the proven SX-Aurora TSUBASA vector architecture, the pro
 ject integrates the open-standard RISC-V instruction set to foster innovat
 ion and collaboration. NEC (a Japanese IT company) partners with Openchip 
 & Software Technologies in Spain to co-develop this next-generation proces
 sor system. The initiative emphasizes not only advanced hardware but also 
 a robust software ecosystem, including compiler development and user-frien
 dly programming tools. The goal is to make powerful vector computing acces
 sible to a broader range of users, from HPC experts to domain scientists. 
 The presentation outlines current HPC challenges, showcases the benefits o
 f vector computing, and details the technical and collaborative aspects of
  the Next Vector Project, including its roadmap and specifications.\n\nTag
 : Hardware and Architecture\n\nRecording: Livestreamed, Recorded\n\nRegist
 ration Category: Technical Program Reg Pass, Exhibits Reg Pass\n\nSession 
 Chair: Mark Feit (Internet2)\n\n
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