Presenter

Dr. Nick Brown is a Senior Research Fellow at EPCC, the University of Edinburgh. His main interest is in the role that novel hardware can play in future supercomputers, and is specifically motivated by the grand-challenge of how we can ensure scientific programmers are able to effectively exploit such technologies without extensive hardware/architecture expertise. Combining novel algorithmic techniques for new hardware, programming language and library design, and compilers, he has over 80 peer-reviewed publications and has worked on a number of large-scale parallel codes. He is chair of the RISC-V HPC SIG, leads EPCC's RISC-V testbed, and has organized and led the RISC-V and UrgentHPC series of workshops at the SC and ISC conferences. He also coordinates knowledge exchange for the UK's ExCALIBUR exascale program. He has moderated numerous panels previously, including one on RISC-V at SC24 and chairing an invited panel at ISC 2019.