Presentation
Design and Implementation of a Custom Hardware Accelerator for SZx Compression in Chipyard
DescriptionAbstract—Data movement bottlenecks have become the dominant performance limiter in modern computing systems. At the same time, scientific detectors generate overwhelming data
volumes; X-ray detectors may soon produce terabytes per second and high-energy physics experiments demand bandwidth on the order of petabytes per second. Streaming compression can reduce data movement overheads, hardware accelerators can further enhance data flow, and the exploration of system-level hardware compressors represents an untapped opportunity. This paper presents a preliminary study on enabling hardware evaluation of streaming compressors. We designed and implemented a custom hardware accelerator for scientific data compression using modern hardware description languages, providing a complete end-toend hardware acceleration system for CPU-based platforms. Our prototype features a multi-stage state machine, parallel element processing, and optimized data transfers, achieving 1.45× speedup
over a software baseline with comparable quality, with 31% fewer cycles per element and 45% faster compression throughput.
volumes; X-ray detectors may soon produce terabytes per second and high-energy physics experiments demand bandwidth on the order of petabytes per second. Streaming compression can reduce data movement overheads, hardware accelerators can further enhance data flow, and the exploration of system-level hardware compressors represents an untapped opportunity. This paper presents a preliminary study on enabling hardware evaluation of streaming compressors. We designed and implemented a custom hardware accelerator for scientific data compression using modern hardware description languages, providing a complete end-toend hardware acceleration system for CPU-based platforms. Our prototype features a multi-stage state machine, parallel element processing, and optimized data transfers, achieving 1.45× speedup
over a software baseline with comparable quality, with 31% fewer cycles per element and 45% faster compression throughput.
Event Type
Workshop
TimeMonday, 17 November 202510:30am - 10:55am CST
Location265
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