Presentation
Invited talk: Cuzco from Open-source to a High Performance Computing CPU Design
DescriptionThe RISC-V ISA, with the RVA23 compatibility profile, is enabling innovation to meet the power-performance-area (PPA) needs of the most demanding computing workloads. Condor Computing presents Cuzco, a novel RISC-V processor IP design, for inclusion in customer System-on-Chips (SoCs) which will compete with current top-of-the-line processors in high-end data center and high-performance computing (HPC) applications, while delivering better PPA results. This paper describes how Cuzco’s design demonstrates that a rapidly maturing RISC-V ecosystem provides the Instruction Set Architecture (ISA), tools and platforms which, when enhanced with internal efforts, can achieve high PPA efficiencies without sacrificing performance. Cuzco is a new class of processor design built around a novel compiler-like instruction scheduling for runtime execution to enable high performance while optimizing power and area dimensions through dynamic and physical scaling, including dynamic and/or physical %optimization of resources for dispatch and retire width. Basline 8-way design achieves a performance of 15-20 SpecInt2K6/GHz.
Event Type
Workshop
TimeMonday, 17 November 20259:00am - 9:30am CST
Location242