Presentation
ASIC Verification Engineer - Automation
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Cornelis Networks
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remote
SessionJob Postings
DescriptionCornelis Networks builds world-class SoCs enabling high performance computing, data analytics, and AI interconnect solutions. We are expanding our Design Verification (DV) organization with engineers who are passionate about tooling, flows, automation, and AI/ML that scale verification to first-pass silicon success.
We are seeking an ASIC Verification Engineer – Automation to own and evolve the tools, flows, automation, and AI capabilities across the entire DV lifecycle—from UVM testbench bring-up and coverage analytics to large-scale regressions, CI/CD, intelligent triage, and release pipelines. You will collaborate with software, hardware, RTL design, emulation, and post-silicon teams to deliver robust, reproducible, and data-driven DV at scale. Ideal candidates combine hands-on ASIC DV experience with a strong focus on automation, infrastructure, and AI-assisted workflows.
Key Responsibilities:
- Architect, implement, and maintain DV automation, regression infrastructure, and CI/CD pipelines.
- Build scalable, reliable pipelines for multi-simulator execution (VCS, Xcelium, Questa).
- Manage coverage collection/merge, results triage, flake detection, and auto-bisection.
- Apply AI/ML for DV acceleration, log/wave summarization, anomaly detection, failure clustering, and predictive test selection.
- Develop and maintain high-quality datasets, heuristics, and models for bug triage and assignment.
- Standardize tooling, environment setups, runbooks, and automated workflows.
- Integrate lint/CDC/formal flows, observability dashboards (Grafana/Prometheus/ELK), and performance metrics.
- Collaborate with DV and design engineers to ensure coverage closure, debuggability, and reproducibility.
- Mentor peers and document best practices for automation and AI-assisted DV.
Minimum Qualifications:
B.S. in EE, CE, CS, or related field.
5+ years (Mid-Level) / 8–10+ years (Senior) in ASIC DV and DV/EDA automation.
Proficiency in SystemVerilog, UVM, and RTL debugging; experience with at least one major simulator (VCS preferred) and coverage tools.
Strong scripting skills (Python, Shell, Tcl, Make/CMake) and Linux proficiency (containers included).
Hands-on Git/GitHub experience, including CI/CD, protected branches, and workflow automation.
Practical experience applying ML/AI to DV flows, triage, or operations; experience with Python ML/data stack.
Familiarity with job schedulers (SLURM/LSF/PBS/SGE) and license-aware scheduling.
Preferred Qualifications:
M.S. in EE, CE, CS, or related.
Domain expertise in high-speed networking: 50G/100G/400G Ethernet MAC/PCS, UDP/TCP/IP, RDMA/RoCE, IPsec.
Deep AI/ML experience for DV: LLMs for summarization, vector stores (FAISS/Milvus), prompt design, MLOps tools, and model serving at regression scale.
Experience with emulation/prototyping (Palladium, ZeBu, Protium, FPGA) integrated into DV flows.
Observability and metrics-driven operations experience; GitHub Enterprise administration; cloud or hybrid HPC for EDA/model workloads.
Location: This is a remote position for employees residing within the United States
We offer a competitive compensation package that includes equity, cash, and incentives, along with health and retirement benefits. Our dynamic, flexible work environment provides the opportunity to collaborate with some of the most influential names in the semiconductor industry.
At Cornelis Networks your base salary is only one component of your comprehensive total rewards package. Your base pay will be determined by factors such as your skills, qualifications, experience, and location relative to the hiring range for the position. Depending on your role, you may also be eligible for performance-based incentives, including an annual bonus or sales incentives.
In addition to your base pay, you’ll have access to a broad range of benefits, including medical, dental, and vision coverage, as well as disability and life insurance, a dependent care flexible spending account, accidental injury insurance, and pet insurance. We also offer generous paid holidays, 401(k) with company match, and Open Time Off (OTO) for regular full-time exempt employees. Other paid time off benefits include sick time, bonding leave, and pregnancy disability leave.
Cornelis Networks does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. Cornelis Networks is an equal opportunity employer, and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity or expression, pregnancy, age, national origin, disability status, genetic information, protected veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
We are seeking an ASIC Verification Engineer – Automation to own and evolve the tools, flows, automation, and AI capabilities across the entire DV lifecycle—from UVM testbench bring-up and coverage analytics to large-scale regressions, CI/CD, intelligent triage, and release pipelines. You will collaborate with software, hardware, RTL design, emulation, and post-silicon teams to deliver robust, reproducible, and data-driven DV at scale. Ideal candidates combine hands-on ASIC DV experience with a strong focus on automation, infrastructure, and AI-assisted workflows.
Key Responsibilities:
- Architect, implement, and maintain DV automation, regression infrastructure, and CI/CD pipelines.
- Build scalable, reliable pipelines for multi-simulator execution (VCS, Xcelium, Questa).
- Manage coverage collection/merge, results triage, flake detection, and auto-bisection.
- Apply AI/ML for DV acceleration, log/wave summarization, anomaly detection, failure clustering, and predictive test selection.
- Develop and maintain high-quality datasets, heuristics, and models for bug triage and assignment.
- Standardize tooling, environment setups, runbooks, and automated workflows.
- Integrate lint/CDC/formal flows, observability dashboards (Grafana/Prometheus/ELK), and performance metrics.
- Collaborate with DV and design engineers to ensure coverage closure, debuggability, and reproducibility.
- Mentor peers and document best practices for automation and AI-assisted DV.
Minimum Qualifications:
B.S. in EE, CE, CS, or related field.
5+ years (Mid-Level) / 8–10+ years (Senior) in ASIC DV and DV/EDA automation.
Proficiency in SystemVerilog, UVM, and RTL debugging; experience with at least one major simulator (VCS preferred) and coverage tools.
Strong scripting skills (Python, Shell, Tcl, Make/CMake) and Linux proficiency (containers included).
Hands-on Git/GitHub experience, including CI/CD, protected branches, and workflow automation.
Practical experience applying ML/AI to DV flows, triage, or operations; experience with Python ML/data stack.
Familiarity with job schedulers (SLURM/LSF/PBS/SGE) and license-aware scheduling.
Preferred Qualifications:
M.S. in EE, CE, CS, or related.
Domain expertise in high-speed networking: 50G/100G/400G Ethernet MAC/PCS, UDP/TCP/IP, RDMA/RoCE, IPsec.
Deep AI/ML experience for DV: LLMs for summarization, vector stores (FAISS/Milvus), prompt design, MLOps tools, and model serving at regression scale.
Experience with emulation/prototyping (Palladium, ZeBu, Protium, FPGA) integrated into DV flows.
Observability and metrics-driven operations experience; GitHub Enterprise administration; cloud or hybrid HPC for EDA/model workloads.
Location: This is a remote position for employees residing within the United States
We offer a competitive compensation package that includes equity, cash, and incentives, along with health and retirement benefits. Our dynamic, flexible work environment provides the opportunity to collaborate with some of the most influential names in the semiconductor industry.
At Cornelis Networks your base salary is only one component of your comprehensive total rewards package. Your base pay will be determined by factors such as your skills, qualifications, experience, and location relative to the hiring range for the position. Depending on your role, you may also be eligible for performance-based incentives, including an annual bonus or sales incentives.
In addition to your base pay, you’ll have access to a broad range of benefits, including medical, dental, and vision coverage, as well as disability and life insurance, a dependent care flexible spending account, accidental injury insurance, and pet insurance. We also offer generous paid holidays, 401(k) with company match, and Open Time Off (OTO) for regular full-time exempt employees. Other paid time off benefits include sick time, bonding leave, and pregnancy disability leave.
Cornelis Networks does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. Cornelis Networks is an equal opportunity employer, and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity or expression, pregnancy, age, national origin, disability status, genetic information, protected veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
RequirementsMinimum Qualifications:
B.S. in EE, CE, CS, or related field.
5+ years (Mid-Level) / 8–10+ years (Senior) in ASIC DV and DV/EDA automation.
Proficiency in SystemVerilog, UVM, and RTL debugging; experience with at least one major simulator (VCS preferred) and coverage tools.
Strong scripting skills (Python, Shell, Tcl, Make/CMake) and Linux proficiency (containers included).
Hands-on Git/GitHub experience, including CI/CD, protected branches, and workflow automation.
Practical experience applying ML/AI to DV flows, triage, or operations; experience with Python ML/data stack.
Familiarity with job schedulers (SLURM/LSF/PBS/SGE) and license-aware scheduling.
Preferred Qualifications:
M.S. in EE, CE, CS, or related.
Domain expertise in high-speed networking: 50G/100G/400G Ethernet MAC/PCS, UDP/TCP/IP, RDMA/RoCE, IPsec.
Deep AI/ML experience for DV: LLMs for summarization, vector stores (FAISS/Milvus), prompt design, MLOps tools, and model serving at regression scale.
Experience with emulation/prototyping (Palladium, ZeBu, Protium, FPGA) integrated into DV flows.
Observability and metrics-driven operations experience; GitHub Enterprise administration; cloud or hybrid HPC for EDA/model workloads.
Company DescriptionCornelis Networks delivers the world’s highest performance scale-out networking solutions for AI and HPC datacenters. Our differentiated architecture seamlessly integrates hardware, software and system level technologies to maximize the efficiency of GPU, CPU and accelerator-based compute clusters at any scale. Our solutions drive breakthroughs in AI & HPC workloads, empowering our customers to push the boundaries of innovation. Backed by top-tier venture capital and strategic investors, we are committed to innovation, performance and scalability - solving the world’s most demanding computational challenges with our next-generation networking solutions.
We are a fast-growing, forward-thinking team of architects, engineers, and business professionals with a proven track record of building successful products and companies. As a global organization, our team spans multiple U.S. states and six countries, and we continue to expand with exceptional talent in onsite, hybrid, and fully remote roles.
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Event Type
Job Posting
TimeMonday, 17 November 20254:32pm - 4:32pm CST
LocationHall 6
United States of America
Cornelis Networks
Remote
Full Time
Permanent